Method of controlling double integral A-D converter

ABSTRACT

The present invention can provide an integral A-D converter of high frequency and of high accuracy and capable of reducing the influence of the integrating capacitor caused by the electric charge absorption property thereof because it compensates the measured data by substracting the compensating data from the measured data, the compensating data being the repeatedly A-D converted data of the ground voltage during the standardized initiating time of the integrating capacitor.

BACKGROUND OF THE INVENTION

1. Field of the Invention

The present invention relates to a method of controlling a doubleintegral analog-to-digital converter (hereinafter referred to as adouble integral A-D converter) in order to reduce the influence causedby the electric charge absorption property of an integrating capacitor.

2. Description of the Related Art

An arrangement of a conventional double integral A-D converter will bedescribed with reference to FIG. 2.

The conventional double integral A-D converter comprises an integrator4A having one input connected to an input terminal 1 to which an inputsignal is applied by way of a switch 2A, reference power supplies 3A, 3Bhaving first and second reference voltages by way of switches 2C and 2D,an integrating capacitor 4B and a switch 2E disposed between the inputand output of the integrator 4A, a comparator 5 connected to the outputof the integrator 4A, a gate 7 having one input connected to an outputof the comparator 5 and the other input connected to a clock generatorby way of a switch 2F, a counter 8 connected to an output of the gate 7and producing data for A-D conversion (hereinafter referred to as A-Dconverting data) such as A-D coverting start signal (hereinafterreferred to as start signal) and a control circuit 9 for receiving theA-D converting data and controlling to turn on the switches 2A to 2F.

One cycle of operation of the double integral A-D converter requiresthree procedures or sequences.

The first sequence comprises the step of turning on the switches 2A and2C so that the integrating capacitor 4B stores the electric chargecorresponding to the sum of the first reference voltage V₁ of thereference power supply 3A and an input signal applied to the inputterminal 1. The second sequence comprises the steps of turning on theswitch 2D and turning off the switches 2A and 2C so that the integratingcapacitor 4B discharges the electric charge stored therein uponreception of the second reference voltage V₂ of the reference powersupply 3B so that the clock generator 6 supplies a clock for A-Dconversion (hereinafter referred to as A-D converting clock) to the gate7 and the comparator permits the A-D converting clock to be suppliedfrom the gate 7 to the counter 8 during the period of the discharge ofthe integrating capacitor 4B. The third sequence comprises the step ofturning on the switch 2E and turning off the switches 2D and 2F so thatthe integrating capacitor 4B can discharge the electric charge residualtherein.

The operation of the conventional double integral A-D converter will beexplained with reference to the timing diagram in FIG. 3.

In the diagram of FIG. 3(a), the abscissa represents time, and theordinate represents electric charge stored in the integrating capacitor4B. Denoted at Q₁ is an absorbed electric charge caused by dielectricabsorption phenomenon.

In the diagram of FIG. 3(b), an axis of ordinate represents currentcharged in or discharged from the integrating capacitor 4B in whichdenoted at I₁ is a charging current generated by the reference voltageV₁, I₂ is a discharging current generated by the reference voltage V₂,and I₃ is a discharging current of the absorbing electric charge.

In FIG. 3(c), the ordinate represents the voltage which appeared at theanode and cathode of the integrating capacitor 4B.

In FIG. 3, the A-D conversion by integrating capacitor 4B is initiatedat the time T₀ when the analog input signal applied to the inputterminal 1 is not subject to the A-D conversion.

The residual electric charge of the integrating capacitor 4B based onwhich the A-D conversion is initiated at the time T₀ is mainly composedof the following components:

(a) the electric charge stored during the delay time counting from thedetection of ground voltage by the comparator 5 to the switching off ofthe switch 2D by the control circuit 9, and

(b) the absorbed electric charge caused by the electric chargeabsorption property of the integrating capacitor 4B.

Although the residual electric charge (a) can be discharged forinitiating A-D conversion in less than ten times as long as the timeconstant which is determined by the equation τ=CR wherein C is anelectrostatic capacitance of the integrating capacitor 4B and R is aresistance generated when the switch 2E is turned on, the absorbedelectric charge takes more than several seconds for initiating A-Dconversion.

Consequently, when the A-D conversion is repeated in short cycles, theresidual electric charge caused by the preceding A-D conversion maycause the A-D converting data error.

The operation of the conventional double integral A-D converter, in casethat the A-D conversion is repeated, will be described with reference toFIG. 4.

In FIG. 4, the abscissa represents time and the ordinate of FIG. 4(a)represents the electric charge stored in the integrating capacitor 4B.

The ordinate of FIG. 4(b) represents the voltage which appears at theanode and cathode of the integrating capacitor 4B, and W₁₁ through W₁₃represent voltage waveforms which appear when the integrator 4A carriesout integration upon reception of the A-D conversion start signal.

The waveform W₁₂ suffers less influence from the absorbed electriccharge because the time T₃ associated therewith is long, but W₁₃ isgreatly influenced by the absorbed electric charge because the time T₃associated therewith is short.

The influence caused by the absorbed electric charge of the integratingcapacitor 4B on the A-D converting data is determined by the A-Dconversion cycle and the amount of the electric charge stored during thetime T₁ for integrating the input signal in the preceding A-D conversionsequence. Consequently, if the A-D conversion is made in the same cycleand the range of the input signal is limited to some extent, the A-Dconverting data is always subjected to the constant influence caused bythe absorbed electric charge.

SUMMARY OF THE INVENTION

If the A-D conversion is made, disregarding the input signal, namely,even when the integrator does not receive the start signal, dataobtained by such A-D conversion can be used as correction data. It istherefore possible to correct for the aforementioned prior art A-Dconversion errors by subtracting the correction data from measured A-Dconversion data.

The present invention is to provide a method of controlling an integralA-D converter capable of reducing the influence caused by the electriccharge absorption property of integrating capacitors even in case ofhigh frequency A-D conversion.

To achieve the above object, the present invention comprises the stepsof repeating an A-D conversion of a ground voltage when no start signalis input, determining an initiating time required for the integratingcapacitor to discharge therefrom the residual electric charge other thanthe absorbed electric charge caused by the dielectric absorptionproperty thereof, repeating the A-D conversions in a sequence whereinthe initiating time of the integrating capacitor temporally separatessuccessive conversions and subtracting the aforementioned correctiondata obtained in the preceeding conversion from the measured A-Dconversion data of the present conversion.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a timing diagram showing an operation of the A-D converter ofthe present invention;

FIG. 2 is a block diagram showing an arrangement of a conventionaldouble integral A-D converter;

FIGS. 3(a) to 3(c) are timing diagrams showing an operation of theconventional double integral A-D converter shown in FIG. 2; and

FIGS. 4(a) and 4(b) are timing diagrams showing an operation of theconventional double integral A-D converter in FIG. 2 in case that theA-D conversion is repeated.

DESCRIPTION OF THE PREFERRED EMBODIMENT

A double integral A-D converter for carrying out a method of the presentinvention has the same arrangement as the conventional one asillustrated in FIG. 2. Accordingly, the numerals denoted at each elementof the arrangement of the conventional double integral A-D converter arethe same and the explanation thereof is omitted.

The operation of the present invention will be described hereinafterwith reference to the timing diagram shown in FIG. 1.

The ordinate represents voltages appearing at the anode and cathode ofthe integrating capacitor 4B. The abscissa represents time. Denoted atW₁ to W₇ are waveforms of the voltages appearing at the anode andcathode of the integrating capacitor 4B which are produced when the A-Dconversion is initiated at the time when the integrator 4 receives thestart signal. The waveforms W₁ and W₂ are those of the ground voltagewhich appear at the anode and cathode of the integrating capacitor 4Bwhen the ground voltage is subjected to the A-D conversion at the timewhen the integrator 4 does not receive the start signal. The waveform W₃is that of the input signal which appear when the input signal issubjected to the A-D conversion at the time when the integrator 4receives the start signal during the production of the waveform W₂, anda time T₄ is required for initiating the A-D conversion after thecompletion of production of the waveform W₂. The waveform W₄ is that ofthe ground voltage which is produced when the ground voltage issubjected to the A-D conversion when the integrator 4 does not receivethe start signal. The waveform W₅ is that of the input signal which isproduced when the input signal is subjected to the A-D conversion at thetime when the integrator 4 receives the start signal during theproduction of the waveform W₄ and the initiating time T₄ elapsed afterthe completion of production of the waveform W₄. The waveform W₆ is thatof the input signal which is produced when the input signal is subjectedto the A-D conversion at the time when the integrator 4 receives thestart signal during the production of the waveform W₅ and the time T₄elapsed after the completion of production of the waveform W₅. Thewaveforms W₇ and W₈ are those of the ground voltage which are producedwhen the ground voltage is repeatedly subjected to the A-D conversion atthe time when the integrator does not receive the start signal.

When the input signal is not subjected to the A-D conversion, i.e., whenthe ground voltage is subjected to the A-D conversion where thewaveforms W₁, W₂, W₄, W₇ and W₈ are produced, the A-D conversion of theground voltage is made when the integrator 4 receives the input signalhaving the voltage half of the input signal so that the time T₃ forinitiating the A-D conversion by the integrating capacitor 4B is alwaysconstant. The A-D conversion is repeated while the time T₄ is constant.Data obtained in such A-D conversion is employed as a correction datawhich is stored in the control circuit 9.

The time T₄ for initiating the integrating capacitor 4B is determined soas to completely discharge the residual electric charge other than theabsorbed electric charge caused by the dielectric absorption property.For example, it is set to be several times as long as the time constantτ=CR.

When the input signal is subjected to the A-D conversion where thewaveforms W₃, W₅ and W₆ are produced, the A-D conversion is made in themanner as mentioned earlier. That is, the A-D conversion of the inputsignal is made at the time when the integrator 4 receives the startsignal and the time T₄ elapsed after the completion of the A-D sequenceunder execution at present.

Inasmuch as the absorbed electric charge always influences the A-Dconverting data, the correction data is subtracted from the A-Dconversion value, thereby obtaining the A-D converting data of highaccuracy and capable of reducing the influence caused by the absorbedelectric charge.

According to the method of controlling a double integral A-D converterof the present invention, the A-D converting sequences are repeated andare temporally separated by initiating time of the integratingcapacitor, and the data obtained by such A-D conversion is employed asthe correction data. Inasmuch as the correction data is subtracted fromthe A-D conversion value, it is possible to provide the double integralA-D converter capable of converting in a short cycle and of reducing theinfluence caused by the electric charge absorption property whichassures the A-D conversion with high accuracy.

What is claimed is:
 1. A method of controlling a double integral A-Dconverter comprising the steps of:obtaining correction data byperforming a first A-D conversion of a ground voltage input when no A-Dconverting start signal is input; obtaining measured A-D conversion databy performing a second A-D conversion of an input signal when the A-Dconverting start signal is received; determining an initiating timerequired for an integrating capacitor to discharge therefrom a residualelectric charge other than an absorbed electric charge caused by adielectric absorption property thereof; repeating the first and secondA-D conversions in a sequence which is determined by the presence ofabsence of the A-D converting start signal and in which successive A-Dconversions are temporally separated by the initiating time of theintegrating capacitor; and determining that said sequence of A-Dconversions includes an occurrence of said first A-D conversionsuccessively followed by an occurrence of said second A-D conversion,and thereafter subtracting the correction data obtained in the first A-Dconversion from the measured A-D conversion data obtained in the secondA-D conversion.